By M.C. Bhuvaneswari
This ebook describes how evolutionary algorithms (EA), together with genetic algorithms (GA) and particle swarm optimization (PSO) can be used for fixing multi-objective optimization difficulties within the quarter of embedded and VLSI procedure layout. Many advanced engineering optimization difficulties might be modelled as multi-objective formulations. This booklet presents an advent to multi-objective optimization utilizing meta-heuristic algorithms, GA and PSO and the way they are often utilized to difficulties like hardware/software partitioning in embedded structures, circuit partitioning in VLSI, layout of operational amplifiers in analog VLSI, layout house exploration in high-level synthesis, hold up fault checking out in VLSI checking out and scheduling in heterogeneous disbursed structures. it's proven how, in each one case, a few of the facets of the EA, specifically its illustration and operators like crossover, mutation, and so on, will be individually formulated to unravel those difficulties. This e-book is meant for layout engineers and researchers within the box of VLSI and embedded approach layout. The publication introduces the multi-objective GA and PSO in an easy and simply comprehensible means that might attract introductory readers.
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Extra resources for Application of Evolutionary Algorithms for Multi-objective Optimization in VLSI and Embedded Systems
2002; Wang et al. 2003; Hassan et al. 2004; Sudholt and Witt 2008). All of these algorithms aimed at optimization of a single objective. Multi-objective optimization was carried out by different researchers. Multi-objective circuit partitioning for cut size and path delay minimization was proposed by Cristinel Ababei et al. (2002). Fuzzy rules were incorporated into single-objective GA, Tabu search and Simulated evolution, in order to handle the multi-objective cost function designed for delay and power by Khan et al.
6 Optimal solutions obtained using MOPSO-CD Output Solution 1 Solution 2 Solution 3 Solution 4 Solution 5 Solution 6 Solution 7 Solution 8 Solution 9 Solution 10 Solution 11 Solution 12 Solution 14 Solution 15 Total area (KB) 4,088 1,870 1,599 1,460 1,331 1,258 1,129 1,086 987 944 815 814 801 672 Node implementation 1111110111 1011110011 1011010011 1011000011 1011110011 1011000010 1010000010 1011000000 0010000010 0011000000 0010000000 1000000000 0001000000 0000000000 Total execution time (μs) 1,406 1,407 1,419 1,463 1,606 1,671 1,800 1,933 1,971 2,142 2,233 2,570 2,610 2,701 Number of process in HW 9 7 6 5 7 7 3 3 2 2 1 1 1 0 Execution Time (µs) Exhaustive Search Results 3000 2500 2000 1500 1000 500 0 0 1000 2000 3000 Area (KB) 4000 5000 Fig.
2 shows the delay in communication between each node. 3. 6 list all the pareto-optimal solutions obtained using the three algorithms WSGA, NSGA-II, and MOPSO-CD, respectively along with the HW/SW implementation for 10-node system. C. Bhuvaneswari and M. 1 Data table for 10-node system Node no. 3 Parameter settings used in multi-objective algorithms for 10-node DAG S. No. 1. 2. 3. 4. 5. 8 – Two point 30 MOPSO-CD – – – – 100 NSGA-II and MOPSO-CD are able to determine all the pareto-optimal solutions.
Application of Evolutionary Algorithms for Multi-objective Optimization in VLSI and Embedded Systems by M.C. Bhuvaneswari